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Some clocks have a timing adjustment (a fast-slow control). Left alone, the wall clock will continue to diverge from the reference clock at the same few seconds per hour rate. To keep the wall clock in sync with the reference clock, each week the owner compares the time on their wall clock to a more accurate clock (a phase comparison), and resets their clock. Over time, that time difference would become substantial. A wall clock, for example, might be fast by a few seconds per hour compared to the reference clock at NIST.
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Left on its own, each clock will mark time at slightly different rates. Clocks are, with varying degrees of accuracy, phase-locked (time-locked) to a leader clock. Phase can be proportional to time, so a phase difference can be a time difference. Therefore the frequency of the two signals is the same. Since neither car is allowed to lap the other, the cars make the same number of laps in a given time period. The result is that both race cars will circle the track in lockstep with a fixed phase difference (or constant distance) between them.
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If they are too close to the other car, the driver will slow down. If the hind driver is too far away, they will increase their speed to close the gap. Each driver will measure the phase difference (a fraction of the distance around the lap) between themselves and the other race car. The two race cars represent the input and output frequency of the PLL in a locked state. This means neither of the race cars is permitted to overtake and pass the other car. However, if there is an accident, a yellow caution flag is raised. This is analogous to the PLL in an unlocked state.
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The separation of the cars (a distance) corresponds to the phase difference between the two oscillating signals.ĭuring most of the race, each car is on its own and free to pass the other and lap the other. The number of laps per hour (a speed) corresponds to the frequency. Each lap corresponds to a complete cycle.
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One represents the input frequency, the other the PLL's output voltage-controlled oscillator (VCO) frequency. Practical analogies Automobile race analogy Īs an analogy of a PLL, consider a race between two cars.
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Phase-locked loops are widely employed in radio, telecommunications, computers and other electronic applications. These properties are used for computer clock synchronization, demodulation, and frequency synthesis. Consequently, in addition to synchronizing signals, a phase-locked loop can track an input frequency, or it can generate a frequency that is a multiple of the input frequency. Keeping the input and output phase in lock step also implies keeping the input and output frequencies the same. The oscillator generates a periodic signal, and the phase detector compares the phase of that signal with the phase of the input periodic signal, adjusting the oscillator to keep the phases matched. There are several different types the simplest is an electronic circuit consisting of a variable frequency oscillator and a phase detector in a feedback loop. A phase-locked loop or phase lock loop ( PLL) is a control system that generates an output signal whose phase is related to the phase of an input signal.